Teramount Raises $50M to Tackle AI’s Deepest Bottleneck: Optical Connectivity at Scale
With backing from AMD, Samsung Catalyst, Hitachi Ventures, and Koch Disruptive Technologies, Israeli startup Teramount is bringing semiconductor-grade scalability to fiber-optic interconnects for AI and high-performance computing.
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As AI models grow larger, faster, and more power-hungry, a new bottleneck has emerged – and it’s not inside the chip. It’s between them. Teramount, an Israeli startup building infrastructure to solve one of AI’s least visible but most urgent hardware problems – optical connectivity between chips – announced today a $50 million Series A round. The funding is led by Koch Disruptive Technologies (KDT), with participation from AMD Ventures, Hitachi Ventures, Samsung Catalyst Fund, Wistron, and Grove Ventures.
The round signals growing industry consensus around an complex but mission-critical challenge: enabling fast, energy-efficient data movement between processors inside increasingly dense AI systems. While GPU and accelerator innovation has received the lion’s share of attention in recent years, the pipes connecting those compute elements – often still copper – are now dragging down overall system performance.
Teramount’s solution is centered around its TeraVerse™ platform – a passive, self-aligning optical connector that links fiber-optic cables to silicon photonics chips inside Co-Packaged Optics (CPO) systems. What makes it unique is not just the performance, but its manufacturability. Using patented PhotonicPlug™ and PhotonicBump™ technology, Teramount enables fiber-to-chip connectivity using standard semiconductor tools and workflows, eliminating the need for expensive, manual fiber alignment.
That approach mirrors what Taha calls “the fabless moment” for photonics. Much like the chip industry separated design, fabrication, and packaging to enable scale, Teramount’s platform aligns optical integration with the high-volume realities of modern semiconductor production.
It’s a direction that’s resonating. The company has active partnerships with leading semiconductor foundries and OSATs (outsourced semiconductor assembly and test providers), including Tower Semiconductor and GlobalFoundries. With the shift toward Co-Packaged Optics – in which optics and compute sit side-by-side in the same package – major players are under pressure to find fiber solutions that don’t break the packaging model.
The investor roster reflects that urgency. AMD Ventures’ participation signals the increasing relevance of optical interconnects for compute architecture itself. Samsung Catalyst Fund and Hitachi Ventures, both active in silicon photonics, add strategic depth. And KDT’s involvement suggests a long-term bet on Teramount becoming a foundational layer in AI infrastructure.
“This investment, which brings together strong financial and strategic investors representing important parts of the optical connectivity ecosystem, is a testament to the potential of our technology in AI infrastructure and other high-performance applications,” said Taha. “We are grateful to our new and existing investors for their support.”
Teramount’s plug-and-play design also solves a persistent problem in optical systems: serviceability. Unlike permanently bonded fibers, its connectors are detachable and modular – a key requirement for large-scale data center deployments.
The new capital will be used to expand the company’s team and scale to volume production, with the goal of positioning Teramount as a key enabler of the Co-Packaged Optics ecosystem just as hyperscalers and chipmakers ramp up adoption.
As photonics moves from lab-scale demonstrations to industrial deployment, the real challenge isn’t just about how light moves through glass – it’s about how that glass connects to the chip, at scale. Teramount is betting that solving that problem isn’t a side story in AI’s next chapter. It’s the missing link.
As AI models grow larger, faster, and more power-hungry, a new bottleneck has emerged – and it’s not inside the chip. It’s between them. Teramount, an Israeli startup building infrastructure to solve one of AI’s least visible but most urgent hardware problems – optical connectivity between chips – announced today a $50 million Series A round. The funding is led by Koch Disruptive Technologies (KDT), with participation from AMD Ventures, Hitachi Ventures, Samsung Catalyst Fund, Wistron, and Grove Ventures.
The round signals growing industry consensus around an complex but mission-critical challenge: enabling fast, energy-efficient data movement between processors inside increasingly dense AI systems. While GPU and accelerator innovation has received the lion’s share of attention in recent years, the pipes connecting those compute elements – often still copper – are now dragging down overall system performance.
Teramount’s solution is centered around its TeraVerse™ platform – a passive, self-aligning optical connector that links fiber-optic cables to silicon photonics chips inside Co-Packaged Optics (CPO) systems. What makes it unique is not just the performance, but its manufacturability. Using patented PhotonicPlug™ and PhotonicBump™ technology, Teramount enables fiber-to-chip connectivity using standard semiconductor tools and workflows, eliminating the need for expensive, manual fiber alignment.
